Alif Semiconductor /AE512F80F55D5AS_CM55_HP_View /CLKCTL_PER_MST /USB_CTRL2

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Interpret as USB_CTRL2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FLADJ_30MHZ_REG 0 (PME_EN)PME_EN 0 (POR_RST_MASK)POR_RST_MASK

Description

USB Control Register 2

Fields

FLADJ_30MHZ_REG

Frequency adjust value of USB

PME_EN

Power management enable of USB

POR_RST_MASK

Active-high USB PHY PoR reset mask. Must be set/cleared during PHY power-down/up sequence.

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